a) Field of the Invention
The present invention relates to techniques of filling a fine contact hole in an insulating layer with wiring material of a wiring layer for the electrical connection between the wiring layer and an underlying layer having a conductive surface.
b) Description of the Related Art
For the electrical connection between an impurity doped layer and a wiring layer over the doped layer or between multi-wiring layers of semiconductor devices, generally a connection hole (e.g. contact hole, via hole) is formed in an insulating layer formed between two layers to be electrically connected, and the connection hole is filled with wiring material. If the connection hole is filled insufficiently, contact failure may occur.
In order to have a good manufacture yield of semiconductor devices, in addition to properly filled connection holes, the wiring layer after the hole filling process is required to have as flat a surface as possible without leaving irregular surfaces. For planarization, a conventional hole filling process uses an etch-back process, an Al reflow sputtering process, and other processes.
An etch-back process is a combination of a conventional film forming process such as sputtering, and an etching process. With this process, wiring material is first deposited thicker than a final wiring layer, by sputtering or other processes. Thereafter, the surface of the wiring layer is planarized by coating material with fluidity such as photoresist. After this photoresist is thermally set, it is dry-etched uniformly from the surface thereof to remove irregular surfaces and obtain a final planarized wiring layer.
An Al reflow sputtering process can be used when Al or Al alloy is used as wiring material. This process sputters wiring material at a substrate temperature at which Al can be fluidized. Since the sputtered film has fluidity, the wiring material flows from convexities to concavities to planarize the wiring layer surface. As compared to usual sputtering, the hole filling performance can be improved, and in addition, planarization is performed at the same time.
As semiconductor devices are becoming highly integrated, the diameters of connection holes are becoming small. An aspect ratio of a depth to a diameter of a connection hole tends to increase. Not only with usual sputtering but also with Al reflow sputtering, the larger is the aspect ratio of a connection hole, the worse is the step coverage of a formed wiring layer and the more difficult is the process of properly filling the connection hole.